Golgappa.net | Golgappa.org | BagIndia.net | BodyIndia.Com | CabIndia.net | CarsBikes.net | CarsBikes.org | CashIndia.net | ConsumerIndia.net | CookingIndia.net | DataIndia.net | DealIndia.net | EmailIndia.net | FirstTablet.com | FirstTourist.com | ForsaleIndia.net | IndiaBody.Com | IndiaCab.net | IndiaCash.net | IndiaModel.net | KidForum.net | OfficeIndia.net | PaysIndia.com | RestaurantIndia.net | RestaurantsIndia.net | SaleForum.net | SellForum.net | SoldIndia.com | StarIndia.net | TomatoCab.com | TomatoCabs.com | TownIndia.com
Interested to Buy Any Domain ? << Click Here >> for more details...

VLSI Interview Questions
Questions Answers Views Company eMail

If not into production, how far did you follow the design and why did not you see it into production?

Intel,

2148

Insights of an inverter. Explain the working?

Intel,

1 10408

Insights of a 2 input NOR gate. Explain the working?

Infosys, Intel,

1 3736

Insights of a 2 input NAND gate. Explain the working?

Intel,

1 9053

Implement F= not (AB+CD) using CMOS gates?

Intel,

1 6124

Insights of a pass gate. Explain the working?

Intel,

5030

Why do we need both PMOS and NMOS transistors to implement a pass gate?

INEL, Intel,

3 14826

What does the above code synthesize to?

Intel,

2660

Cross section of a PMOS transistor?

Intel,

4816

Cross section of an NMOS transistor?

Intel,

3 10071

What is a D-latch? Write the VHDL Code for it?

Intel,

3 22755

Differences between D-Latch and D flip-flop?

AIT, Intel, Sibridge Technologies,

17 65915

Implement D flip-flop with a couple of latches? Write a VHDL Code for a D flip-flop?

Intel,

6 20819

What is latchup? Explain the methods used to prevent it?

Intel,

2 9759

What is charge sharing?

Cypress Semiconductor, Intel,

2 13632


Post New VLSI Questions

Un-Answered Questions { VLSI }

What is the purpose of having depletion mode device?

1101


Design an 8 is to 3 encoder using 4 is to encoder?

1376


Explain how logical gates are controlled by Boolean logic?

1236


What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?

2934


What is the function of enhancement mode transistor?

1176


What is the function of tie-high and tie-low cells?

1147


What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus

1316


Explain why is the number of gate inputs to cmos gates usually limited to four?

1550


Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.

1344


Explain what is Verilog?

1155


What transistor level design tools are you proficient with? What types of designs were they used on?

5107


What does it mean “the channel is pinched off”?

1399


Implement a function with both ratioed and domino logic and merits and demerits of each logic?

3846


What are the Advantages and disadvantages of Mealy and Moore?

1344


Explain the working of 4-bit Up/down Counter?

4488