Interested to Buy Any Domain ? << Click Here >> for more details...
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Explain how binary number can give a signal or convert into a digital signal?
How does a Bandgap Voltage reference work?
What are the various regions of operation of mosfet? How are those regions used?
Explain the working of Insights of an inverter ?
Explain the three regions of operation of a mosfet.
Explain why is the number of gate inputs to cmos gates usually limited to four?
For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)
How logical gates are controlled by boolean logic?
Working of a 2-stage OPAMP?
Explain what is Verilog?
How can you construct both PMOS and NMOS on a single substrate?
Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers
What are the different design constraints occur in the synthesis phase?
Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?
