VLSI Interview Questions
Questions Answers Views Company eMail

what is the difference between the TTL chips and CMOS chips?

842

what is verilog?

868

What are the different gates where boolean logic are applicable?

839

Explain why is the number of gate inputs to cmos gates usually limited to four?

1303

Why does the present vlsi circuits use mosfets instead of bjts?

1005

What is the main function of metastability in vsdl?

838

What is the function of tie-high and tie-low cells?

872

What are the different types of skews used in vlsi?

1 1644

What are the different design constraints occur in the synthesis phase?

907

What are the steps involved in preventing the metastability?

929

What are the changes that are provided to meet design power targets?

893

What are the various regions of operation of mosfet? How are those regions used?

865

Explain what is the depletion region?

862

What are the steps required to solve setup and hold violations in vlsi?

867

What are the different ways in which antenna violation can be prevented?

910


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Un-Answered Questions { VLSI }

Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?

933


Explain what is slack?

869


6-T XOR gate?

4024


What is threshold voltage?

932


What is the function of tie-high and tie-low cells?

872


What are the steps involved in designing an optimal pad ring?

953


How can you model a SRAM at RTL Level?

5513


In Verilog code what does “timescale 1 ns/ 1 ps” signifies?

986


Draw the stick diagram of a NOR gate. Optimize it

1014


What's the price in 1K quantity?

2620


Explain depletion region.

837


Explain Cross section of a PMOS transistor?

995


What does the above code synthesize to?

2299


Give various factors on which threshold voltage depends.

1028


Draw a 6-T SRAM Cell and explain the Read and Write operations

1053