Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
1591You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other
1505What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?
1246How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?
1173For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)
1227Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
1411Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?
1242For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD
1394Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.
1249Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?
1401
Implement a function with both ratioes and domino logic and merits and demerits of each logic?
Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?
What types of CMOS memories have you designed? What were their size? Speed?
For CMOS logic, give the various techniques you know to minimize power consumption
Explain Basic Stuff related to Perl?
Explain what is the use of defpararm?
What does it mean “the channel is pinched off”?
What are the steps involved in designing an optimal pad ring?
What is the difference between cmos and bipolar technologies?
What are the different classification of the timing control?
What is the ideal input and output resistance of a current source?
Draw the Layout of an Inverter?
what is SCR (Silicon Controlled Rectifier)?
Explain how Verilog is different to normal programming language?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing Vgs.