VLSI Interview Questions
Questions Answers Views Company eMail

6-T XOR gate?

Intel,

3996

Differences between blocking and Non-blocking statements in Verilog?

Intel,

5 20015

Differences between Signals and Variables in VHDL? If the same code is written using Signals and Variables what does it synthesize to?

IIT, Intel,

1 20195

Differences between functions and Procedures in VHDL?

Intel,

5 53802

What is component binding?

Intel,

2 5646

What is polymorphism? (C++)

Intel,

2 5536

What is hot electron effect?

Intel,

3 12520

Define threshold voltage?

College School Exams Tests, Intel, JHG, Wipro,

32 129928

Factors affecting Power Consumption on a chip?

Intel,

7 16148

Explain Clock Skew?

Intel, nvidia,

6 20403

Why do we use a Clock tree?

Intel,

3 12758

Explain the various Capacitances associated with a transistor and which one of them is the most prominent?

Intel,

2 7629

Explain the Various steps in Synthesis?

Intel,

3047

Explain ASIC Design Flow?

Intel, JK Associates, Mind Tree,

2 14844

Explain Custom Design Flow?

Intel,

2 6564


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Un-Answered Questions { VLSI }

what is the use of defpararm?

931


Implement F= not (AB+CD) using CMOS gates?

3780


How does a Bandgap Voltage reference work?

3553


Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?

1072


Are you familiar with the term MESI?

2368


Explain what is multiplexer?

835


Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

1297


What products have you designed which have entered high volume production?

2202


What are the steps required to solve setup and hold violations in vlsi?

832


Working of a 2-stage OPAMP?

2860


Why does the present vlsi circuits use mosfets instead of bjts?

977


What is the difference between the mealy and moore state machine?

810


How can you construct both PMOS and NMOS on a single substrate?

4730


What are the steps involved in preventing the metastability?

901


What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus

1044