VLSI Interview Questions
Questions Answers Views Company eMail

Mention what are the different gates where Boolean logic are applicable?

913

what is a sequential circuit?

852

what is the use of defpararm?

952

Explain how binary number can give a signal or convert into a digital signal?

906

why is the number of gate inputs to CMOS gates usually limited to four?

1074

what are three regions of operation of MOSFET and how are they used?

978

what is SCR (Silicon Controlled Rectifier)?

856

Explain why present VLSI circuits use MOSFETs instead of BJTs?

934

what is multiplexer?

900

In Verilog code what does “timescale 1 ns/ 1 ps” signifies?

990

Explain how Verilog is different to normal programming language?

927

Explain what is Verilog?

891

what is Slack?

959

Mention what are the two types of procedural blocks in Verilog?

1024

Explain how logical gates are controlled by Boolean logic?

908


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Un-Answered Questions { VLSI }

Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

1335


What is Body Effect?

2301


Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram

1150


How about voltage source?

2046


What are the different design techniques required to create a layout for digital circuits?

831


What is look up table in vlsi?

778


Explain various adders and difference between them?

952


Are you familiar with the term MESI?

2390


Explain what is the use of defpararm?

914


Implement a function with both ratioes and domino logic and merits and demerits of each logic?

998


What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?

2645


Explain the Various steps in Synthesis?

3074


Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)

1143


For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD

1212


Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes considering Channel Length Modulation.

983