Answer / coolmoon

clock skew is the time difference between the arrival of
active clock edge to different flipflops of the same chip

Answer / anuprita

In circuit designs, clock skew is a phenomenon in
synchronous circuits in which the clock signal arrives at
different components at different times. This can be caused
by many different things, such as wire-interconnect length,
temperature variations, variation in intermediate devices,
capacitive coupling, material imperfections, and
differences in input capacitance on the clock inputs of
devices using the clock.

Answer / gogulnath

skew is the phenomena which clock dint take equal time to
reach the synchronous flip flop,it takes diff delay to
diff flipflops due to the material imperfection,wired
length,temparature etc,

Answer / himali

Clock skew is the phenomenon wherein clock signal arrives
at different components at different times.
There are two types of clock skews. Positive clock skew
means that clock siganl reaches receiving register faster
than the register that sends the data to the receiver.
Negative skew is the opposite.

Answer / anupriya

In ckt design clk skew is a phenomenon in synchronous ckts
in which the clk signal arives at different components at
diff time.

Answer / madhu

When a clock is triggered, if it reaches first to
destination and next to source then we have a loss of
data,or if it reaches first to source and later to
destination we have a wrong result .this is called Clock
skew,so it is necessary to a clock to reach simultaneously
to source and destination.

What?s the critical path in a SRAM?

2 Answers   Infosys, Intel, Texas,

How about voltage source?

0 Answers  

Working of a 2-stage OPAMP?

0 Answers   Intel, Tata Elxsi,

In what cases do you need to double clock a signal before presenting it to a synchronous state machine?

1 Answers   Intel,

What types of high speed CMOS circuits have you designed?

0 Answers   Intel,

How can you model a SRAM at RTL Level?

1 Answers  

Draw a 6-T SRAM Cell and explain the Read and Write operations

0 Answers   Infosys,

Explain the concept of a Clock Divider Circuit? Write a VHDL code for the same?

3 Answers   Intel,

Are you familiar with the term snooping?

1 Answers   Intel,

Advantages and disadvantages of Mealy and Moore?

2 Answers   Intel,

What products have you designed which have entered high volume production?

0 Answers   Intel,

Give the various techniques you know to minimize power consumption?

5 Answers