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VLSI Interview Questions
Questions Answers Views Company eMail

How can you construct both PMOS and NMOS on a single substrate?

IBM, Intel,

4984

What happens when the gate oxide is very thin?

Intel,

3 14131

What is setup time and hold time?

Intel,

1 6329

Write a pseudo code for sorting the numbers in an array?

Intel,

2 14857

What is pipelining and how can we increase throughput using pipelining?

Intel,

1 5218

Explain about stuck at fault models, scan design, BIST and IDDQ testing?

Intel,

3 13374

What is SPICE?

Intel,

4 17741

Differences between IRSIM and SPICE?

Intel,

5439

Differences between netlist of HSPICE and Spectre?

Intel,

1 9003

What is FPGA?

Intel,

7 14929

Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?

Intel,

3380

Draw the Layout of an Inverter?

Intel,

2507

If the current thru the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?

Intel,

1 7045

Implement F = AB+C using CMOS gates?

Intel,

2 11485

Working of a 2-stage OPAMP?

Intel, Tata Elxsi,

3187


Post New VLSI Questions

Un-Answered Questions { VLSI }

Explain the three regions of operation of a mosfet.

1098


What types of high speed CMOS circuits have you designed?

2576


What are the main issues associated with multiprocessor caches and how might you solve them?

2235


What products have you designed which have entered high volume production?

2448


You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other

1573


Give various factors on which threshold voltage depends.

1306


How does Vbe and Ic change with temperature?

3518


Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing Vgs.

1118


Explain why present VLSI circuits use MOSFETs instead of BJTs?

1155


Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)

1204


Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

1455


Explain why is the number of gate inputs to cmos gates usually limited to four?

1501


what is a sequential circuit?

1170


For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?

2401


What types of CMOS memories have you designed? What were their size? Speed?

4662