Golgappa.net | Golgappa.org | BagIndia.net | BodyIndia.Com | CabIndia.net | CarsBikes.net | CarsBikes.org | CashIndia.net | ConsumerIndia.net | CookingIndia.net | DataIndia.net | DealIndia.net | EmailIndia.net | FirstTablet.com | FirstTourist.com | ForsaleIndia.net | IndiaBody.Com | IndiaCab.net | IndiaCash.net | IndiaModel.net | KidForum.net | OfficeIndia.net | PaysIndia.com | RestaurantIndia.net | RestaurantsIndia.net | SaleForum.net | SellForum.net | SoldIndia.com | StarIndia.net | TomatoCab.com | TomatoCabs.com | TownIndia.com
Interested to Buy Any Domain ? << Click Here >> for more details...


Suppose you have a combinational circuit between two
registers driven by a clock. What will you do if the delay
of the combinational circuit is greater than your clock
signal? (You can't resize the combinational circuit
transistors)

Answers were Sorted based on User's Feedback



Suppose you have a combinational circuit between two registers driven by a clock. What will you do..

Answer / adi

Insert a small buffer to increase the skew between the two
regs. This can be quick fix only in some cases though

Is This Answer Correct ?    13 Yes 0 No

Suppose you have a combinational circuit between two registers driven by a clock. What will you do..

Answer / anonymous

Insert a reg slice

Is This Answer Correct ?    8 Yes 1 No

Suppose you have a combinational circuit between two registers driven by a clock. What will you do..

Answer / pavankumar v vijapur

use register retiming concept .......
i.e split up comb delay in two paths using a flop

Is This Answer Correct ?    4 Yes 1 No

Suppose you have a combinational circuit between two registers driven by a clock. What will you do..

Answer / raguvaran

pipeline the design dude

Is This Answer Correct ?    4 Yes 1 No

Suppose you have a combinational circuit between two registers driven by a clock. What will you do..

Answer / ram

when there is a combo delay which is more than the clock
time period, though all the above can be a solution if the
delay is small, normally they mark it as a multi clock cycle
path.

Is This Answer Correct ?    3 Yes 1 No

Suppose you have a combinational circuit between two registers driven by a clock. What will you do..

Answer / guest

Ideally, clock period will be increased (reducing maximum
operation frequency)

Is This Answer Correct ?    3 Yes 3 No

Post New Answer

More VLSI Interview Questions

How do you detect if two 8-bit signals are same?

6 Answers  


Explain depletion region.

0 Answers  


What does it mean “the channel is pinched off”?

0 Answers  


What are the main issues associated with multiprocessor caches and how might you solve them?

1 Answers   Intel,


What is Noise Margin? Explain the procedure to determine Noise Margin?

0 Answers  


What is the purpose of having depletion mode device?

0 Answers  


Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

0 Answers  


Explain the working of 4-bit Up/down Counter?

0 Answers   Intel,


Draw the Layout of an Inverter?

0 Answers   Intel,


For a 0.18um and 0.8um technology MOSFET, which has a higher cutoff frequency?

2 Answers  


What happens if we use an Inverter instead of the Differential Sense Amplifier?

0 Answers   Infosys,


Design an 8 is to 3 encoder using 4 is to encoder?

0 Answers   Intel,


Categories