Suppose you have a combinational circuit between two
registers driven by a clock. What will you do if the delay
of the combinational circuit is greater than your clock
signal? (You can't resize the combinational circuit
transistors)
Answers were Sorted based on User's Feedback
Answer / adi
Insert a small buffer to increase the skew between the two
regs. This can be quick fix only in some cases though
Is This Answer Correct ? | 13 Yes | 0 No |
Answer / pavankumar v vijapur
use register retiming concept .......
i.e split up comb delay in two paths using a flop
Is This Answer Correct ? | 4 Yes | 1 No |
Answer / ram
when there is a combo delay which is more than the clock
time period, though all the above can be a solution if the
delay is small, normally they mark it as a multi clock cycle
path.
Is This Answer Correct ? | 3 Yes | 1 No |
Answer / guest
Ideally, clock period will be increased (reducing maximum
operation frequency)
Is This Answer Correct ? | 3 Yes | 3 No |
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