Suppose you have a combinational circuit between two
registers driven by a clock. What will you do if the delay
of the combinational circuit is greater than your clock
signal? (You can't resize the combinational circuit
transistors)
- 6 Answers
- 11481 Views
- I also Faced
- E-Mail Answers
Answer Posted / ram
when there is a combo delay which is more than the clock
time period, though all the above can be a solution if the
delay is small, normally they mark it as a multi clock cycle
path.
| Is This Answer Correct ? | 3 Yes | 1 No |
Post New Answer View All Answers
Explain Cross section of a PMOS transistor?
What is the function of tie-high and tie-low cells?
What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus
Write a program to explain the comparator?
What is the difference between the mealy and moore state machine?
Explain about 6-T XOR gate?
Cross section of a PMOS transistor?
What are the Advantages and disadvantages of Mealy and Moore?
What is the difference between synchronous and asynchronous reset?
Working of a 2-stage OPAMP?
How does Vbe and Ic change with temperature?
Describe the various effects of scaling?
Mention what are three regions of operation of mosfet and how are they used?
Explain the operation of a 6T-SRAM cell?
What are the steps required to solve setup and hold violations in vlsi?
