Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can't resize the combinational circuit transistors)

6 Answers  

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What is the ideal input and output resistance of a current source?

0 Answers  

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Describe the various effects of scaling?

0 Answers   Infosys,

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Give the cross-sectional diagram of the cmos.

0 Answers  

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Explain the concept of a Clock Divider Circuit? Write a VHDL code for the same?

3 Answers   Intel,

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Explain what is slack?

0 Answers  

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What are the different design techniques required to create a layout for digital circuits?

0 Answers  

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What happens if we delay the enabling of Clock signal?

4 Answers  

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What are the main issues associated with multiprocessor caches and how might you solve them?

1 Answers   Intel,

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What types of high speed CMOS circuits have you designed?

2 Answers   Infosys, Intel,

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How does a pn junction works?

2 Answers   Wipro,

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What is the function of chain reordering?

0 Answers  

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