Answer / hasan

help for pipeline circuit simulation code by HSPICE.

How do you size NMOS and PMOS transistors to increase the threshold voltage?

4 Answers  

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How many bit combinations are there in a byte?

6 Answers   Intel,

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Cross section of a PMOS transistor?

0 Answers   Intel,

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What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

0 Answers   Intel,

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Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

0 Answers  

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What are the limitations in increasing the power supply to reduce delay?

2 Answers   Infosys,

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Explain about stuck at fault models, scan design, BIST and IDDQ testing?

3 Answers   Intel,

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What is the ideal input and output resistance of a current source?

0 Answers  

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If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?

0 Answers   Intel,

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What is Noise Margin? Explain the procedure to determine Noise Margin?

0 Answers  

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If not into production, how far did you follow the design and why did not you see it into production?

1 Answers   Intel,

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Explain Cross section of an NMOS transistor?

0 Answers   Intel,

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