Implement F = AB+C using CMOS gates?
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Answer / nehru
cmos design combination of both pmos and nmos.pmos is pull
up network.nmos pull down network.A TRANISTOR IS CONNECTED
SERIES WITH B TRANSISTOR.THE SERIES COMBINATION OF BOTH
A AND B TRANSISTOR CONNECTED PARALLEL WITH C TRANSISTOR(IN
PULL DOWN CKT).THEN APPLY DUALITY PROPERTY TO PMOS.THEN
FINAL OUTPUT IS COMPLEMENTED BY CMOS INVERTER.THIS FUNCTION
IMPLEMENTED IN DIFFERENT LOGICS
1.CMOS LOGIC
2.C2 MOS LOGIC
3.NP LOGIC
4.DYNAMIC LOGIC
5.PASS TRANSISTOR LOGIC
6.DOMINO LOGIC
7.DIFFERENTIAL CASCADE VOLTAGE SWITCH LOGIC
8.PSUEDO NMOS LOGIC
| Is This Answer Correct ? | 11 Yes | 11 No |
Answer / radhika
CMOS gate consists of both NMOS and PMOS.
Two NMOS ,a and b are connected in series with each other and their series combination is in parallel with c named nmos.For PMOS ,a and b are connected in parallel with each other and this parallel combination is in series with c named pmos.Output is taken from PMOS and NMOS junction.
| Is This Answer Correct ? | 1 Yes | 3 No |
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