Answer Posted / gogulnath
skew is the phenomena which clock dint take equal time to
reach the synchronous flip flop,it takes diff delay to
diff flipflops due to the material imperfection,wired
length,temparature etc,
Is This Answer Correct ? | 21 Yes | 0 No |
Post New Answer View All Answers
Explain the working of Insights of a pass gate ?
Implement a function with both ratioed and domino logic and merits and demerits of each logic?
Explain the Charge Sharing problem while sampling data from a Bus?
What are the Factors affecting Power Consumption on a chip?
Write a VLSI program that implements a toll booth controller?
Mention what are three regions of operation of mosfet and how are they used?
What are the different gates where boolean logic are applicable?
For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD
What is look up table in vlsi?
For CMOS logic, give the various techniques you know to minimize power consumption
Explain the working of Insights of an inverter ?
Describe the various effects of scaling?
Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers
Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?
If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?