In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?

0 Answers   Infosys,

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Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR? Why?

13 Answers   Intel,

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Explain why present VLSI circuits use MOSFETs instead of BJTs?

0 Answers  

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Insights of a 4bit adder/Sub Circuit?

0 Answers   Intel,

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Explain the difference between write through and write back cache.

2 Answers   Intel,

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Explain what is multiplexer?

0 Answers  

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Explain how MOSFET works?

0 Answers  

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What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?

0 Answers   Intel,

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Implement a function with both ratioes and domino logic and merits and demerits of each logic?

0 Answers   Intel,

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Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times

0 Answers   Infosys,

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How does a pn junction works?

2 Answers   Wipro,

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If not into production, how far did you follow the design and why did not you see it into production?

1 Answers   Intel,

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