What transistor level design tools are you proficient with?
What types of designs were they used on?
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What are the different measures that are required to achieve the design for better yield?
How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?
Explain the various MOSFET Capacitances & their significance?
Explain the usage of the shared SPI bus?
Cross section of a PMOS transistor?
For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)
How do you size NMOS and PMOS transistors to increase the threshold voltage?
How do you detect if two 8-bit signals are same?
Explain Clock Skew?
What are the limitations in increasing the power supply to reduce delay?
What are the various regions of operation of mosfet? How are those regions used?
Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram