what is Channel length modulation?

2 Answers   Intel,

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Why do we need both PMOS and NMOS transistors to implement a pass gate?

3 Answers   INEL, Intel,

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Explain the difference between write through and write back cache.

2 Answers   Intel,

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How many bit combinations are there in a byte?

6 Answers   Intel,

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If the current through the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?

0 Answers   Intel,

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How do you size NMOS and PMOS transistors to increase the threshold voltage?

4 Answers  

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What is Body Effect?

0 Answers   CG CoreEL, Cisco, TA,

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Give the cross-sectional diagram of the cmos.

0 Answers  

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Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

0 Answers  

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Working of a 2-stage OPAMP?

0 Answers   Intel, Tata Elxsi,

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For a 0.18um and 0.8um technology MOSFET, which has a higher cutoff frequency?

2 Answers  

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What are the changes that are provided to meet design power targets?

0 Answers  

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