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VLSI Interview Questions
Questions Answers Views Company eMail

Explain CMOS Inverter transfer characteristics?

ADS,

3875

Explain sizing of the inverter?

Infosys,

4376

How do you size NMOS and PMOS transistors to increase the threshold voltage?

4 29387

What is Noise Margin? Explain the procedure to determine Noise Margin?

2423

Give the expression for CMOS switching power dissipation?

Cypress Semiconductor,

2 8232

What is Body Effect?

CG CoreEL, Cisco, TA,

2470

What happens to delay if you increase load capacitance?

Google,

1 3579

What are the limitations in increasing the power supply to reduce delay?

Infosys,

2 13342

How does Resistance of the metal lines vary with increasing thickness and increasing length?

Infosys,

3 13478

What happens if we increase the number of contacts or via from one metal layer to the next?

Infosys,

1 7467

Give the various techniques you know to minimize power consumption?

5 12889

Explain the Charge Sharing problem while sampling data from a Bus?

1 4152

What happens if we use an Inverter instead of the Differential Sense Amplifier?

2948

What is the critical path in a SRAM?

3126

In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?

Infosys,

4079


Post New VLSI Questions

Un-Answered Questions { VLSI }

what is the use of defpararm?

1111


What types of CMOS memories have you designed? What were their size? Speed?

4615


Implement a function with both ratioes and domino logic and merits and demerits of each logic?

1156


How does Vbe and Ic change with temperature?

3471


Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

1028


Implement a function with both ratioed and domino logic and merits and demerits of each logic?

3741


Differences between Array and Booth Multipliers?

4021


For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD

1404


What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

2398


Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?

1091


For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?

2355


Explain what is the depletion region?

1035


For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

1235


What are the different design techniques required to create a layout for digital circuits?

1004


Differences between IRSIM and SPICE?

5396