Give the various techniques you know to minimize power
consumption?
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Answer / garima
1.Dynamic Frequency scaling: use of programmable dividers.
2. Good RTL coding techinques,
1.using clock gating cells during RTL phasing with
intelligent gating enabling logic.
2. using gray coding.
Do not depen entirely on sythesis inserted clock gating
3. Dynamic Voltage scaling.
4. Low power modes: application based most of the cores ex
ARM supports various modes.
5. Power Gating : SRPG.
| Is This Answer Correct ? | 6 Yes | 0 No |
Answer / narayanachowdary
clock gating
multiple thresholdvoltages,
logic restructuring,....
| Is This Answer Correct ? | 2 Yes | 0 No |
Answer / narendra
Hi Panchamiukhi, can you please elaborate on 2nd and 3rd
options? They sound interesting but didnt understand. Thanks
| Is This Answer Correct ? | 0 Yes | 0 No |
Answer / jaya suriya.i
1.reduce the vdd.its
2.using short channel devices(its very complicated).
3.reduce the load capacitance of cmos..
| Is This Answer Correct ? | 0 Yes | 0 No |
Answer / panchamukhi.ellur
Various techniques are available to minimize the power
consumption such as
1)Multiple vdd technique ,depnding on application and power
required for that particular module use specific power
supply(vdd).
2)Using multiple thickness of THINOXIDE
3)To avoid short ckt current stack tecniques
| Is This Answer Correct ? | 0 Yes | 4 No |
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