Have you studied pipelining? List the 5 stages of a 5 stage
pipeline. Assuming 1 clock per stage, what is the latency
of an instruction in a 5 stage machine? What is the
throughput of this machine ?
Answers were Sorted based on User's Feedback
Answer / adi
Latency is 5 clocks
Throughput is 1 instruction/clock
| Is This Answer Correct ? | 18 Yes | 1 No |
Answer / inspiredminds
5 stages are:
Instruction Fetch
Instruction Decode
Execution
Data Memory(Read/write)
Write Back
Latency(time required for the first instruction to produce
output) is 5 cycles and for long stream of instructions the
throughput is 1 instruction per clock cycle.
| Is This Answer Correct ? | 12 Yes | 3 No |
Answer / el ingeniero
Instruction Fetch
Instruction Decode
Register File Access
Execute
Writeback
| Is This Answer Correct ? | 14 Yes | 11 No |
How can you construct both PMOS and NMOS on a single substrate?
what is conductance and valence band?
Explain the Charge Sharing problem while sampling data from a Bus?
For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?
Explain various adders and diff between them?
Insights of a Tri-State Inverter?
In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?
Explain Cross section of an NMOS transistor?
What is the function of enhancement mode transistor?
What is interrupt latency?
Insights of a 2 input NAND gate. Explain the working?
What was your role in the silicon evaluation or product ramp? What tools did you use?