What is setup time and hold time?

1 Answers   Intel,

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Implement an Inverter using a single transistor?

4 Answers   Intel,

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How does Resistance of the metal lines vary with increasing thickness and increasing length?

3 Answers   Infosys,

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What is polymorphism? (C++)

2 Answers   Intel,

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What is the critical path in a SRAM?

0 Answers  

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Insights of a 2 input NOR gate. Explain the working?

1 Answers   Infosys, Intel,

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What is latchup? Explain the methods used to prevent it?

2 Answers   Intel,

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How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?

0 Answers   Infosys,

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what is charge sharing?

0 Answers   Intel,

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what is Slack?

0 Answers  

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In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?

0 Answers   Infosys,

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Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

4 Answers   Intel,

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