Differences between Signals and Variables in VHDL? If the same code is written using Signals and Variables what does it synthesize to?

1 Answers   IIT, Intel,

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Explain the various MOSFET Capacitances & their significance?

1 Answers  

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Mention what are the different gates where Boolean logic are applicable?

0 Answers  

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What is a D-latch? Write the VHDL Code for it?

3 Answers   Intel,

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what is Early effects and their physical origin.

1 Answers  

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How do you detect a sequence of "1101" arriving serially from a signal line?

7 Answers   nvidia,

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Have you studied buses? What types?

5 Answers   Intel,

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verify nmos passes good logic 0 and passes bad logic 1.also verify that pmos passes good logic 1 and passes bad logic 0.

2 Answers   Cosmic Circuits, HP,

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Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

0 Answers  

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How many bit combinations are there in a byte?

6 Answers   Intel,

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Explain the concept of a Clock Divider Circuit? Write a VHDL code for the same?

3 Answers   Intel,

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How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?

0 Answers   Infosys,

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