What was your role in the silicon evaluation/product ramp?
What tools did you use?
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What is the difference between the mealy and moore state machine?
Give the cross-sectional diagram of the cmos.
What are the changes that are provided to meet design power targets?
What happens if we delay the enabling of Clock signal?
Explain the difference between write through and write back cache.
Explain how Verilog is different to normal programming language?
Explain the usage of the shared SPI bus?
why is the number of gate inputs to CMOS gates usually limited to four?
Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR? Why?
Define threshold voltage?
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Differences between blocking and Non-blocking statements in Verilog?
What are the two types of noise of MOSFET, how to eliminate them?(Thermal and Flicker).