Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
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Cross section of an NMOS transistor?
Basic Stuff related to Perl?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Why do we need both PMOS and NMOS transistors to implement a pass gate?
Explain the operation considering a two processor computer system with a cache for each processor.
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Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers
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What is the critical path in a SRAM?
Explain why is the number of gate inputs to cmos gates usually limited to four?
Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)
Explain what is slack?