Explain the difference between write through and write back cache.

2 Answers   Intel,

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Explain how MOSFET works?

0 Answers  

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What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?

0 Answers   Infosys,

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What is the difference between fifo and the memory?

6 Answers   DewSoft, Intel, Pentagon Rugged Systems,

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Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

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Write a VLSI program that implements a toll booth controller?

0 Answers   Patni,

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What?s the critical path in a SRAM?

2 Answers   Infosys, Intel, Texas,

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What are the main issues associated with multiprocessor caches and how might you solve them?

0 Answers   Intel,

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Insights of a Tri-State Inverter?

3 Answers   Intel,

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Give the expression for CMOS switching power dissipation?

2 Answers   Cypress Semiconductor,

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What is Noise Margin? Explain the procedure to determine Noise Margin?

4 Answers   Amkor, Cisco, Infosys, Intel,

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Explain the operation considering a two processor computer system with a cache for each processor.

0 Answers   Intel,

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