Explain how logical gates are controlled by Boolean logic?

0 Answers  

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Draw the stick diagram of a NOR gate. Optimize it

0 Answers   Infosys,

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What?s the critical path in a SRAM?

2 Answers   Infosys, Intel, Texas,

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What happens to delay if we include a resistance at the output of a CMOS circuit?

1 Answers   Infosys,

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How can you construct both PMOS and NMOS on a single substrate?

0 Answers   IBM, Intel,

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How to improve these parameters? (Cascode topology, use long channel transistors)

0 Answers  

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Explain about stuck at fault models, scan design, BIST and IDDQ testing?

3 Answers   Intel,

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Explain how Verilog is different to normal programming language?

0 Answers  

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what is the difference between the TTL chips and CMOS chips?

0 Answers  

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Differences between netlist of HSPICE and Spectre?

1 Answers   Intel,

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Give various factors on which threshold voltage depends.

0 Answers  

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For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD

0 Answers   Infosys,

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