Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can't resize the combinational circuit transistors)

6 Answers  

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Are you familiar with VHDL and/or Verilog?

17 Answers   Intel,

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What is the critical path in a SRAM?

0 Answers  

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What was your role in the silicon evaluation or product ramp? What tools did you use?

0 Answers   Intel,

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Why do we need both PMOS and NMOS transistors to implement a pass gate?

3 Answers   INEL, Intel,

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What types of CMOS memories have you designed? What were their size? Speed?

0 Answers   Intel, Wipro,

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What?s the critical path in a SRAM?

2 Answers   Infosys, Intel, Texas,

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Draw a 6-T SRAM Cell and explain the Read and Write operations

0 Answers   Infosys,

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What are the different design techniques required to create a layout for digital circuits?

0 Answers  

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What r the phenomenon which come into play when the devices are scaled to the sub-micron lengths?

4 Answers   Intel,

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What is LVS, DRC?

10 Answers   IBM, Intel,

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Explain the difference between write through and write back cache.

2 Answers   Intel,

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