What are the main issues associated with multiprocessor
caches and how might you solve them?
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Explain the sizing of the inverter?
Who provides the DRC rules?
Insights of a pass gate. Explain the working?
What is Fowler-Nordheim Tunneling?
What is the critical path in a SRAM?
How do you size NMOS and PMOS transistors to increase the threshold voltage?
Implement F = AB+C using CMOS gates?
What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?
Explain the various MOSFET Capacitances & their significance ?
Explain why & how a MOSFET works?
Write a VLSI program that implements a toll booth controller?
What types of high speed CMOS circuits have you designed?