Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
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If the current thru the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?
Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
Explain the concept of a Clock Divider Circuit? Write a VHDL code for the same?
Differences between blocking and Non-blocking statements in Verilog?
Id vs. Vds Characteristics of NMOS and PMOS transistors?
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what is Slack?
Draw the SRAM Write Circuitry
what is the difference between the testing and verification?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.
What is interrupt latency?
Why don?t we use just one NMOS or PMOS transistor as a transmission gate?
What is the function of tie-high and tie-low cells?