In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?
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What types of high speed CMOS circuits have you designed?
Explain Cross section of a PMOS transistor?
You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?
While using logic design, explain the various steps that r followed to obtain the desirable design in a well defined manner?
How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?
Write a program to explain the comparator?
You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?
What types of CMOS memories have you designed? What were their size? Speed?
What happens if we use an Inverter instead of the Differential Sense Amplifier?
Differences between IRSIM and SPICE?
Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?
Are you familiar with the term snooping?