What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?

0 Answers   Infosys,

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What products have you designed which have entered high volume production?

1 Answers   Intel,

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Differences between IRSIM and SPICE?

0 Answers   Intel,

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What are the different measures that are required to achieve the design for better yield?

0 Answers  

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Explain Custom Design Flow?

2 Answers   Intel,

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what is Channel length modulation?

2 Answers   Intel,

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Why does the present vlsi circuits use mosfets instead of bjts?

0 Answers  

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Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram

0 Answers   Infosys,

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Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

0 Answers   Infosys,

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Give the expression for CMOS switching power dissipation?

2 Answers   Cypress Semiconductor,

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What transistor level design tools are you proficient with? What types of designs were they used on?

0 Answers   Intel,

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Draw the Layout of an Inverter?

0 Answers   Intel,

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