Answer / amar

State machine to detect 3 consecutive heads appearing in
multiple tosses;

state 1 : initial state
As long as the toss results in TAIL , in this state
If the toss results in HEAD go to state 2
state 2 : HEAD1 resulted
in the next toss , If TAIL is resulted go to
the initial state1 . If HEAD is resulted go to
state3.
state3 : HEAD2 is resulted
in the next toss , If TAIL is resulted go to
the initial state1 . If HEAD is resulted go to
state4.
state4 : HEAD3 is resulted and this is the final state
As long as the HEAD results in each next toss
be in state 4. If any toss results in TAIL go to
initial state1

If the substrate doping concentration increase, or temperature increases, how will Vt change? it increase or decrease?

1 Answers  

---

Explain how MOSFET works?

0 Answers  

---

Are you familiar with the term MESI?

1 Answers   Intel,

---

In Verilog code what does “timescale 1 ns/ 1 ps” signifies?

0 Answers  

---

Explain why is the number of gate inputs to cmos gates usually limited to four?

0 Answers  

---

What is polymorphism? (C++)

2 Answers   Intel,

---

Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

0 Answers  

---

What is LVS, DRC?

10 Answers   IBM, Intel,

---

What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?

0 Answers   Intel,

---

What is validation?

2 Answers   Intel,

---

What was your role in the silicon evaluation/product ramp? What tools did you use?

0 Answers   Intel,

---

what is Channel length modulation?

2 Answers   Intel,

---