Answer / satyanarayana

the power dissipation in C MOS is p=CV*VF where the charge
moved is the capacitance multiplied by the voltage
change,multiply by the switching frequency on the load
capacitance to get the current used,and multiply by voltage
again to get the characteristic switching power

Answer / ahamed.s

C V^2 f

What are the different ways in which antenna violation can be prevented?

0 Answers  

---

Give the cross-sectional diagram of the cmos.

0 Answers  

---

Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

0 Answers   Infosys,

---

Differences between IRSIM and SPICE?

0 Answers   Intel,

---

Why do we need both PMOS and NMOS transistors to implement a pass gate?

3 Answers   INEL, Intel,

---

Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

---

Mention what are the two types of procedural blocks in Verilog?

0 Answers  

---

Mention what are three regions of operation of mosfet and how are they used?

0 Answers  

---

What are the steps required to solve setup and hold violations in vlsi?

0 Answers  

---

For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?

0 Answers   Intel,

---

What is validation?

2 Answers   Intel,

---

Explain what is the depletion region?

0 Answers  

---