Answer / mahesh

Crosstalk is coupling effect of capacitance that takes place
between a weak net and an aggressor net

Answer / manjula

Crosstalk is coupling effect of capacitance it will give
more effect to critical signal

Answer / jay patel

cross talk is basically a coupling of portion of energy of
one part of system into another one.

it occurs due to electrically coupling or magnetically coupling,

as two traces in circuit are separated there is a mutual
capacitance exist depend on spacing and potential differance
and so coupled voltage into another

simillarly when current flow in trace magnetic field induced
and get coupled into another due to mutual inductance.
magnitude of it depend on differance in current in both one.

cross talk is major linmiting factor in circuit design

Answer / t.murugan

In series of Inverter is placed, the charge sharing happen
between the input capacitance with the help of an load
capacitane but we cant get the desired logical output.

Remedies:

The load capacitane must be ten times greater than input
capacitance.

Differences between netlist of HSPICE and Spectre?

1 Answers   Intel,

---

What is interrupt latency?

3 Answers  

---

Have you studied buses? What types?

1 Answers   Intel,

---

What are the Advantages and disadvantages of Mealy and Moore?

0 Answers   Intel,

---

Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?

0 Answers   Intel,

---

Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

3 Answers   Intel,

---

Why do we need both PMOS and NMOS transistors to implement a pass gate?

3 Answers   INEL, Intel,

---

Advantages and disadvantages of Mealy and Moore?

2 Answers   Intel,

---

What?s the difference between Testing & Verification?

6 Answers   Infosys,

---

Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

4 Answers   Intel,

---

How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?

0 Answers   Infosys,

---

Cross section of an NMOS transistor?

3 Answers   Intel,

---