Answer / anm

Design is a general term,applicable in every field of
engineering.however production is termed as to follow up
the steps after design to make product available in the
market.

Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

3 Answers   Intel,

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What transistor level design tools are you proficient with? What types of designs were they used on?

0 Answers   Intel,

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Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.

0 Answers   Intel, Sun Microsystems,

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Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

0 Answers  

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Explain Custom Design Flow?

2 Answers   Intel,

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Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?

0 Answers   Infosys,

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Explain what is multiplexer?

0 Answers  

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Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

0 Answers  

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Explain the concept of a Clock Divider Circuit? Write a VHDL code for the same?

3 Answers   Intel,

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What is Cross Talk?

4 Answers   Intel,

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What are the main issues associated with multiprocessor caches and how might you solve them?

1 Answers   Intel,

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What are the different measures that are required to achieve the design for better yield?

0 Answers  

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