What happens if we use an Inverter instead of the Differential Sense Amplifier?

0 Answers   Infosys,

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Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

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Implement F = AB+C using CMOS gates?

2 Answers   Intel,

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Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

4 Answers   Intel,

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Implement a 2 I/P and gate using Tran gates?

0 Answers   Intel,

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Why does the present vlsi circuits use mosfets instead of bjts?

0 Answers  

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What?s the difference between Testing & Verification?

6 Answers   Infosys,

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Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

3 Answers   Intel,

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What is the function of tie-high and tie-low cells?

0 Answers  

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What are the steps required to solve setup and hold violations in vlsi?

0 Answers  

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Why do we need both PMOS and NMOS transistors to implement a pass gate?

3 Answers   INEL, Intel,

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Explain what is Verilog?

0 Answers  

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