Implement a 2 I/P and gate using Tran gates?
What is the function of tie-high and tie-low cells?
Explain about stuck at fault models, scan design, BIST and IDDQ testing?
What r the phenomenon which come into play when the devices are scaled to the sub-micron lengths?
what is charge sharing?
What is the difference between nmos and pmos technologies?
What is the function of chain reordering?
Differences between IRSIM and SPICE?
What are the different design techniques required to create a layout for digital circuits?
Explain Cross section of an NMOS transistor?
What?s the difference between Testing & Verification?
How does a Bandgap Voltage reference work?
Explain the various MOSFET Capacitances & their significance?