How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect

How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?

Question Posted / teja@tez

No Answer is Posted For this Question
Be the First to Post Answer

More VLSI Interview Questions

What are the steps involved in preventing the metastability?

For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?

Factors affecting Power Consumption on a chip?

Explain why present VLSI circuits use MOSFETs instead of BJTs?

Define threshold voltage?

How to improve these parameters? (Cascode topology, use long channel transistors)

Why is OOPS called OOPS? (C++)

Write a pseudo code for sorting the numbers in an array?

What products have you designed which have entered high volume production?

Explain the operation considering a two processor computer system with a cache for each processor.

What are the different measures that are required to achieve the design for better yield?

Why is Extraction performed?

For more VLSI Interview Questions Click Here