How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?
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How does a Bandgap Voltage reference work?
What are set up time & hold time constraints? What do they signify?
Explain the concept of a Clock Divider Circuit? Write a VHDL code for the same?
What are the Factors affecting Power Consumption on a chip?
Explain the sizing of the inverter?
Explain Custom Design Flow?
Explain the various Capacitances associated with a transistor and which one of them is the most prominent?
Are you familiar with VHDL and/or Verilog?
What is interrupt latency?
What types of CMOS memories have you designed? What were their size? Speed?
What happens if we delay the enabling of Clock signal?
Give the cross-sectional diagram of the cmos.