Explain the operation considering a two processor computer system with a cache for each processor.

0 Answers   Intel,

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Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

0 Answers   Infosys,

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Why do we need both PMOS and NMOS transistors to implement a pass gate?

3 Answers   INEL, Intel,

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How does a pn junction works?

2 Answers   Wipro,

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Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?

0 Answers   Infosys,

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What are the two types of noise of MOSFET, how to eliminate them?(Thermal and Flicker).

4 Answers   Analog Devices,

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Explain Custom Design Flow?

2 Answers   Intel,

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Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes considering Channel Length Modulation.

0 Answers   Infosys,

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Explain what is slack?

0 Answers  

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What is Noise Margin? Explain the procedure to determine Noise Margin?

4 Answers   Amkor, Cisco, Infosys, Intel,

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Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.

1 Answers   Intel,

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What is the difference between = and == in C?

5 Answers   Intel,

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