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Explain the operation of a 6T-SRAM cell?
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In what cases do you need to double clock a signal before presenting it to a synchronous state machine?
Given a circuit and asked to tell the output voltages of that circuit?
1 Answers Intel, Omega Healthcare,
For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?
What are the limitations in increasing the power supply to reduce delay?
What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?
Draw the stick diagram of a NOR gate. Optimize it
What happens to delay if you increase load capacitance?
what is the difference between the TTL chips and CMOS chips?
What are the main issues associated with multiprocessor caches and how might you solve them?
Who provides the DRC rules?
Explain how logical gates are controlled by Boolean logic?
Explain ASIC Design Flow?
2 Answers Intel, JK Associates, Mind Tree,
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