Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

0 Answers   Infosys,

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Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?

0 Answers   Intel,

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Write a program to explain the comparator?

0 Answers  

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What is the difference between cmos and bipolar technologies?

0 Answers  

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what is short Channel effect.

2 Answers  

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Differences between Signals and Variables in VHDL? If the same code is written using Signals and Variables what does it synthesize to?

1 Answers   IIT, Intel,

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What is threshold voltage?

0 Answers  

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What is the difference between synchronous and asynchronous reset?

0 Answers  

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Insights of a Tri-state inverter?

1 Answers   Intel,

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What does it mean “the channel is pinched off”?

0 Answers  

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Explain the working of 4-bit Up/down Counter?

0 Answers   Intel,

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Are you familiar with VHDL and/or Verilog?

1 Answers   Intel,

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