How can you model a SRAM at RTL Level?

1 Answers  

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Differences between Signals and Variables in VHDL? If the same code is written using Signals and Variables what does it synthesize to?

1 Answers   IIT, Intel,

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Implement F= not (AB+CD) using CMOS gates?

0 Answers   Intel,

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Explain why is the number of gate inputs to cmos gates usually limited to four?

0 Answers  

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Implement D flip-flop with a couple of latches? Write a VHDL Code for a D flip-flop?

6 Answers   Intel,

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Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.

0 Answers   Infosys,

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What are the steps involved in designing an optimal pad ring?

0 Answers  

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Explain why present VLSI circuits use MOSFETs instead of BJTs?

0 Answers  

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Explain Cross section of an NMOS transistor?

0 Answers   Intel,

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How does a Bandgap Voltage reference work?

0 Answers  

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How to improve these parameters? (Cascode topology, use long channel transistors)

0 Answers  

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Different ways of implementing a comparator?

1 Answers   Intel,

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