What happens to delay if you increase load capacitance?

3 Answers   Infosys,

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Draw the stick diagram of a NOR gate. Optimize it

0 Answers   Infosys,

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what is short Channel effect.

2 Answers  

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Explain the three regions of operation of a mosfet.

0 Answers  

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Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.

0 Answers   Intel, Sun Microsystems,

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What is interrupt latency?

3 Answers  

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While using logic design, explain the various steps that r followed to obtain the desirable design in a well defined manner?

1 Answers   Intel,

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Implement F= not (AB+CD) using CMOS gates?

0 Answers   Intel,

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What is clock feed through?

2 Answers   Intel,

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What is a linked list? Explain the 2 fields in a linked list?

1 Answers   Intel,

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What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

1 Answers   Intel,

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verify nmos passes good logic 0 and passes bad logic 1.also verify that pmos passes good logic 1 and passes bad logic 0.

2 Answers   Cosmic Circuits, HP,

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