What is the main function of metastability in vsdl?

0 Answers  

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Explain the operation of a 6T-SRAM cell?

0 Answers   Intel,

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What are the steps required to solve setup and hold violations in vlsi?

0 Answers  

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Give the expression for CMOS switching power dissipation?

2 Answers   Cypress Semiconductor,

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Explain the Working of a 2-stage OPAMP?

0 Answers   Intel,

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What is the function of tie-high and tie-low cells?

0 Answers  

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What types of CMOS memories have you designed? What were their size? Speed?

0 Answers   Intel, Wipro,

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Explain the various Capacitances associated with a transistor and which one of them is the most prominent?

2 Answers   Intel,

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What happens to delay if we include a resistance at the output of a CMOS circuit?

1 Answers   Infosys,

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Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR? Why?

13 Answers   Intel,

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Give the cross-sectional diagram of the cmos.

0 Answers  

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You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other

0 Answers   Infosys,

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