Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
What is the critical path in a SRAM?
What are the steps involved in preventing the metastability?
What products have you designed which have entered high volume production?
Explain how logical gates are controlled by Boolean logic?
What happens if we delay the enabling of Clock signal?
Implement a function with both ratioed and domino logic and merits and demerits of each logic?
If not into production, how far did you follow the design and why did not you see it into production?
What is pipelining and how can we increase throughput using pipelining?
What are set up time & hold time constraints? What do they signify?
Are you familiar with VHDL and/or Verilog?
What is hot electron effect?
What is the build-in potential?