What is the main function of metastability in vsdl?

0 Answers  

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Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can't resize the combinational circuit transistors)

6 Answers  

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Mention what are the different gates where Boolean logic are applicable?

0 Answers  

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Explain CMOS Inverter transfer characteristics?

0 Answers   ADS,

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What is the difference between cmos and bipolar technologies?

0 Answers  

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What is FPGA?

7 Answers   Intel,

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Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

0 Answers  

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Explain what is multiplexer?

0 Answers  

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Are you familiar with VHDL and/or Verilog?

1 Answers   Intel,

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If not into production, how far did you follow the design and why did not you see it into production?

1 Answers   Intel,

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In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?

0 Answers   Infosys,

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Explain Custom Design Flow?

2 Answers   Intel,

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