Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)
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Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
what is short Channel effect.
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Draw the Layout of an Inverter?
Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Explain the three regions of operation of a mosfet.
Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers
Draw the stick diagram of a NOR gate. Optimize it
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Explain CMOS Inverter transfer characteristics?
Explain depletion region.