Explain what is slack?

0 Answers  

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What are the ways to Optimize the Performance of a Difference Amplifier?

0 Answers  

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Explain the difference between write through and write back cache.

2 Answers   Intel,

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Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?

0 Answers   Infosys,

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Draw a 6-T SRAM Cell and explain the Read and Write operations

0 Answers   Infosys,

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Explain the various Capacitances associated with a transistor and which one of them is the most prominent?

2 Answers   Intel,

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Implement a 2 I/P and gate using Tran gates?

0 Answers   Intel,

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In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?

0 Answers   Infosys,

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Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers

0 Answers   Infosys,

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For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD

0 Answers   Infosys,

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Cross section of an NMOS transistor?

3 Answers   Intel,

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You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?

4 Answers   Intel,

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