What is latchup? Explain the methods used to prevent it?

2 Answers   Intel,

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What is setup time and hold time?

1 Answers   Intel,

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Explain the difference between write through and write back cache.

2 Answers   Intel,

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Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?

0 Answers   Infosys,

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In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?

0 Answers   Infosys,

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What is a linked list? Explain the 2 fields in a linked list?

1 Answers   Intel,

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what is conductance and valence band?

1 Answers  

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What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

0 Answers   Intel,

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What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

1 Answers   Intel,

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How can you model a SRAM at RTL Level?

1 Answers  

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Explain the difference between write through and write back cache.

2 Answers   Intel,

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What?s the critical path in a SRAM?

2 Answers   Infosys, Intel, Texas,

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