What are the steps involved in preventing the metastability?
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what is a sequential circuit?
What are the different design constraints occur in the synthesis phase?
Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
For f = AB+CD if B is S-a-1, what r the test vectors needed to detect the fault?
Explain why present VLSI circuits use MOSFETs instead of BJTs?
Explain why is the number of gate inputs to cmos gates usually limited to four?
What is look up table in vlsi?
What is the mealy and moore machine's state diagram that can detect 3 consecutive heads of 3 coins ?
Explain the difference between write through and write back cache.
What is charge sharing?
2 Answers Cypress Semiconductor, Intel,
Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?
How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?