Explain why & how a MOSFET works?

2 Answers   Infosys,

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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

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Implement a function with both ratioed and domino logic and merits and demerits of each logic?

0 Answers   Intel,

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what is Latch up?How to avoid Latch up?

3 Answers  

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What are the main issues associated with multiprocessor caches and how might you solve them?

1 Answers   Intel,

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Factors affecting Power Consumption on a chip?

7 Answers   Intel,

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Explain the operation considering a two processor computer system with a cache for each processor.

0 Answers   Intel,

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Explain Cross section of an NMOS transistor?

0 Answers   Intel,

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Explain what is the use of defpararm?

0 Answers  

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Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

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Why is Extraction performed?

1 Answers   Intel,

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Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can't resize the combinational circuit transistors)

6 Answers  

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