Explain the Various steps in Synthesis?

0 Answers   Intel,

---

Are you familiar with the term MESI?

1 Answers   Intel,

---

What are the different design constraints occur in the synthesis phase?

0 Answers  

---

Explain the usage of the shared SPI bus?

1 Answers  

---

What are the different design techniques required to create a layout for digital circuits?

0 Answers  

---

what is the difference between the TTL chips and CMOS chips?

0 Answers  

---

What is Cross Talk?

4 Answers   Intel,

---

Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

0 Answers   Infosys,

---

what is short Channel effect.

2 Answers  

---

What happens to delay if you increase load capacitance?

3 Answers   Infosys,

---

What happens if we use an Inverter instead of the Differential Sense Amplifier?

0 Answers   Infosys,

---

What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?

0 Answers   Infosys,

---