In Verilog code what does “timescale 1 ns/ 1 ps” signifies?

0 Answers  

---

Implement F= not (AB+CD) using CMOS gates?

1 Answers   Intel,

---

What are the different classification of the timing control?

0 Answers  

---

What are the total number of lines written by you in C/C++? What compiler was used?

1 Answers   Intel, Zensar,

---

Explain what is multiplexer?

0 Answers  

---

Explain why is the number of gate inputs to cmos gates usually limited to four?

0 Answers  

---

Have you studied buses? What types?

5 Answers   Intel,

---

What is polymorphism? (C++)

2 Answers   Intel,

---

What was your role in the silicon evaluation or product ramp? What tools did you use?

0 Answers   Intel,

---

What is the function of enhancement mode transistor?

0 Answers  

---

verify nmos passes good logic 0 and passes bad logic 1.also verify that pmos passes good logic 1 and passes bad logic 0.

2 Answers   Cosmic Circuits, HP,

---

Explain various adders and diff between them?

1 Answers   Intel,

---