Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR? Why?

13 Answers   Intel,

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For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?

3 Answers   Intel,

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Differences between DRAM and SRAM?

14 Answers   Infosys, Intel, University, Wipro,

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What is Fermi level?

5 Answers  

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what is Channel length modulation?

2 Answers   Intel,

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What is the difference between nmos and pmos technologies?

0 Answers  

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Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

4 Answers   Intel,

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What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?

0 Answers   Infosys,

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Explain the operation considering a two processor computer system with a cache for each processor.

0 Answers   Intel,

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What is the difference between the mealy and moore state machine?

0 Answers  

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What are the different limitations in increasing the power supply to reduce delay?

2 Answers  

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In what cases do you need to double clock a signal before presenting it to a synchronous state machine?

1 Answers   Intel,

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