Differences between IRSIM and SPICE?

0 Answers   Intel,

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Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

0 Answers  

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Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times

0 Answers   Infosys,

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Are you familiar with the term MESI?

1 Answers   Intel,

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What are the two types of noise of MOSFET, how to eliminate them?(Thermal and Flicker).

4 Answers   Analog Devices,

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What are the total number of lines written by you in C/C++? What compiler was used?

1 Answers   Intel, Zensar,

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What is clock feed through?

2 Answers   Intel,

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Explain the three regions of operation of a mosfet.

0 Answers  

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How do you size NMOS and PMOS transistors to increase the threshold voltage?

0 Answers   Infosys,

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While using logic design, explain the various steps that r followed to obtain the desirable design in a well defined manner?

1 Answers   Intel,

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Insights of a 2 input NAND gate. Explain the working?

1 Answers   Intel,

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What are the changes that are provided to meet design power targets?

0 Answers  

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